Assembly Language, C, Ovm, PERL, Verilog, Shell script, System Verilog, Systemc, System Verilog PLI, Uvm, Emulation, Functional Verification, DPI interface, SoC Verification

rtl verification , Verilog simulations, Sram, AI-assisted tools, Timing Analysis, DRAM, UVM Test Bench, SystemVerilog PLI coding

C, Requirements Traceability, Test Plan Creation, Tcl, Verilog, System Verilog, Python, Perl, Microprocessor architecture, interconnect, Assertions, UVM methodology, Gate Level Simulation, Testcase creation, Directed and constrained random methodologies, Metric Driven Verification, Coverage closure, Formal verification methodologies, SoC Verification, Functional and code coverage