Static Timing Analysis, floorplanning, Synthesis, Power Rail Grid Design, Clock Tree Synthesis, Physical Design Flow, Mentor Graphics, primetime, Place And Route, Fusion Compiler, Innovus, ICC2

Tcl, Python, PERL, Seahawk, Tempus, primetime, Innovus, ICC2

Dsp, C++, Soc, Route, Python, Fc, Tcl, power analysis, Physical Design, Floorplan, Innovus, formal verification