Zebu/ Palladium Emulation Validation Engineer

Emulation Engineer

Work Location: Bangalore / Chennai / Kochi

Experience: 5+

Work Mode: Hybrid | 5 Days Working

Role Overview

We are looking for an experienced Emulation Engineer to work on pre-silicon validation and co-emulation activities for next-generation SoC platforms. The role involves working closely with architecture, design, verification, firmware, and validation teams to build and debug large-scale emulation environments and accelerate feature validation.

Key Responsibilities

• Bring up, configure, and debug emulation environments for complex SoCs.
• Perform pre-silicon validation of SoC features and platform-level functionality.
• Execute and validate use cases related to:
• Cache Coherency (CoH)
• MIO and IOMMU coherent paths
• Trusted P2P and Secure ATS
• Core and platform-level validation
• Support customer co-emulation activities and critical debug scenarios.
• Develop test plans, execute validation scenarios, and drive coverage closure.
• Perform failure analysis, root-cause analysis, and collaborate with design teams to resolve issues.
• Work closely with RTL, firmware, architecture, verification, and model-development teams.
• Develop automation scripts and debug tools to improve validation efficiency.
• Analyze emulation failures and track issues through resolution.
• Contribute to improving emulation and pre-silicon validation methodologies.

Required Skills

• Strong understanding of SoC architecture and pre-silicon validation.
• Hands-on experience with hardware emulation platforms such as ZeBu, Palladium, Veloce, or equivalent.
• Strong knowledge of SystemVerilog and UVM-based verification methodologies.
• Experience with one or more of the following:
• PCIe
• CXL
• Cache Coherency
• IOMMU
• Memory Subsystems
• Security Protocols
• Strong scripting/programming skills in Python, Perl, or Shell.
• Good debugging, failure-analysis, and problem-solving skills.
• Ability to work collaboratively with cross-functional engineering teams.

Experience

• 3–15 years of overall experience, with relevant experience in Design Verification, Emulation, Pre-Silicon Validation, or SoC-level Verification.
• Candidates with 5+ years of strong hands-on SoC emulation/validation experience will be preferred.