5+ years of experience in virtual prototyping, SystemC/TLM‑2.0 modeling, or pre‑silicon software enablement.
- Hands‑on experience with Synopsys Virtualizer, Platform Architect, or similar virtual prototyping tools.
- Strong proficiency in SystemC, C++, and TLM‑2.0 transaction‑level modeling. Experience integrating Synopsys IP models (ARC, PCIe, USB, DDR, GPU, etc.) into VDKs.
- Understanding of SoC architecture: buses, interconnects, interrupts, memory maps, and clock/reset domains.
- Familiarity with embedded software bring‑up (bootloaders, drivers, OS kernels).
Experience debugging complex interactions between models, firmware, and drivers. Nice to have:
- Experience with Synopsys VDK, QEMU, Simics, or other virtual platforms Exposure to RTL (Verilog/VHDL) and co‑simulation flows Knowledge of PCIe, UCIe, CXL, or other high‑speed interconnects Python/Perl scripting for automation
