Virtual Prototype Engineer

Tessolve Semiconductors a venture of Hero Electronix, part of $5B Hero Group companies a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Currently we are 2300+ employees worldwide.

We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China. Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations.

Position: Virtual Prototype Engineer - Bangalore

Location: Bangalore/ Hyderabad

Experience Required: 5+ yrs

Work Mode: On-site

Job Description:

• Create Virtual Development Kits (VDKs) using Synopsys Virtualizer and Synopsys IP models.
• Integrate CPU, GPU, PCIe, UCIe, DDR, and peripheral IP models into a cohesive virtual platform.
• Develop SystemC/TLM‑2.0 models for custom IP blocks, peripherals, and SoC components.
• Build and maintain virtual prototypes for pre‑silicon software development and SoC bring‑up.
• Develop scripts and automation for VDK assembly, configuration, and validation.
• Work closely with hardware design teams to interpret RTL specifications and convert them into SystemC/TLM models.
• Validate functional correctness of models through directed tests, regressions, and co‑simulation with RTL. Support firmware, driver, and OS teams using the VDK for early bring‑up and debugging.
• Optimize model performance, timing accuracy, and simulation speed.
• Document model behavior, APIs, and integration guidelines for internal and external teams.

Key Skills: Synopsys VDK, HSIO, ARM

Experience:

• 5+ years of experience in virtual prototyping, SystemC/TLM‑2.0 modeling, or pre‑silicon software enablement.
• Hands‑on experience with Synopsys Virtualizer, Platform Architect, or similar virtual prototyping tools.
• Strong proficiency in SystemC, C++, and TLM‑2.0 transaction‑level modeling. Experience integrating Synopsys IP models (ARC, PCIe, USB, DDR, GPU, etc.) into VDKs.
• Understanding of SoC architecture: buses, interconnects, interrupts, memory maps, and clock/reset domains.
• Familiarity with embedded software bring‑up (bootloaders, drivers, OS kernels).
• Experience debugging complex interactions between models, firmware, and drivers. Nice to have:
• Experience with Synopsys VDK, QEMU, Simics, or other virtual platforms Exposure to RTL (Verilog/VHDL) and co‑simulation flows Knowledge of PCIe, UCIe, CXL, or other high‑speed interconnects Python/Perl scripting for automation

Education: B.E/B.Tech in Electronics & Communication or Computer Science Engineering

Best Regards,

Shyam Sheriel S | Lead - Talent Acquisition

[Confidential Information]

Tessolve Semiconductor Pvt Ltd

E-City Bangalore, India

www.tessolve.com