Job Summary:
We are looking for a highly experienced Low Power Verification Engineer with strong expertise in UPF‑based low power verification, AMBA protocol verification, and formal verification methodologies. The ideal candidate will lead and contribute to complex SoC verification efforts, ensuring functional correctness, power intent compliance, and protocol adherence across multiple power domains.
Key Responsibilities:
Low Power Verification
- Develop and execute low power verification strategies using UPF (Unified Power Format).
- Verify power intent implementation, including:
- Power domains, power states
- Isolation, retention, and power switching
- Level shifters and power gating
- Validate correctness of power state transitions across different modes (ON, OFF, RETENTION, SLEEP).
- Collaborate with design teams to debug power‑related issues.
Functional & Protocol Verification
- Create and enhance UVM‑based verification environments for SoC/IP.
- Verify AMBA protocols including:
- AXI / AXI‑Lite / AHB / APB
- Develop protocol checkers, assertions, and coverage models.
- Perform integration‑level and subsystem‑level verification.
Formal Verification
- Apply formal verification techniques for:
- Control‑intensive logic
- Low power structures
- Protocol compliance and deadlock checks
- Develop SystemVerilog Assertions (SVA) for formal and simulation reuse.
- Run property checking, equivalence checking, and lint/fp analysis.
Debug & Quality
- Analyze complex simulation and formal failures.
- Root‑cause low power, protocol, and functional bugs.
- Improve verification completeness through coverage closure.
Leadership & Collaboration
- Mentor junior engineers and review verification code.
- Drive verification best practices and methodology improvements.
- Work closely with design, low‑power architects, and physical design teams.
Required Skills & Qualifications:
Technical Skills
- 8–12 years of hands‑on experience in ASIC/SoC verification
- Strong expertise in Low Power Verification with UPF
- In‑depth knowledge of AMBA protocols (AXI/AHB/APB)
- Proven experience with Formal Verification tools and methodologies
- Excellent command of:
- SystemVerilog
- UVM
- SVA
- Experience with major simulators and formal tools (e.g., Questa, VCS, Jasper, VC Formal)
Conceptual Knowledge
- Power‑aware simulation and verification flows
- Multi‑power‑domain SoC architectures
- Coverage‑driven verification
- Assertion‑based verification
Soft Skills
- Strong debugging and analytical skills
- Ability to work independently and lead verification efforts
- Good communication and cross‑functional collaboration skills
Education:
- Bachelor's or Master's degree in Electronics / Electrical / Computer Engineering
Interested candidates please share your updated resume on [Confidential Information]
