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UFS Verification Engineer

UFS Verification Engineer

scaledge technology
5-7 Years
Not Disclosed
  • Posted 15 days ago
  • Be among the first 10 applicants

Job Description

Hiring: UFS Verification Specialist (5+ Years Experience)

Location: Bangalore

Experience: 5+ Years

We are actively looking for experienced UFS Design Verification (DV) Engineers to join a leading VLSI team working on next-generation UFS (Universal Flash Storage) IP/SoC solutions.

Key Responsibilities

*) Develop and execute comprehensive verification plans for UFS IP/Subsystems.

*) Create and maintain SystemVerilog/UVM-based verification environments.

*) Develop test cases, assertions, checkers, scoreboards, and coverage models.

*) Debug complex functional issues and work closely with design teams for resolution.

*) Perform protocol-level verification of UFS, UniPro, M-PHY, and related interfaces.

*) Analyze simulation results, coverage metrics, and drive closure activities.

*) Collaborate with architecture, design, firmware, and validation teams throughout the product lifecycle.

*) Support regression execution and improve verification methodologies and automation.

Required Skills

*) Bachelor's/Master's degree in Electronics, Electrical Engineering, or related field.

*) 5+ years of experience in ASIC/SoC Design Verification.

*) Strong expertise in SystemVerilog and UVM methodology.

*) Experience in developing verification environments from scratch.

*) Strong debugging and problem-solving skills.

*) Knowledge of functional coverage, assertions (SVA), and verification planning.

*) Experience with industry-standard simulators and verification tools.

Interested candidates can share their resumes at [Confidential Information]

More Info

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Key Skills

industry-standard simulators

verification environments

functional coverage assertions

verification planning

ASIC SoC Design Verification

UVM methodology

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