Staff Verification Engineer- LoRa
- Posted a month ago
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Job Description
Responsibilities
- Define and implement test plans and verification strategies based on design specifications and requirements (20%).
- Develop assertion-based checkers and functional coverage models aligned to verification plans (20%).
- Perform functional verification of RTL designs using industry-standard methodologies (e.g. UVM) (20%).
- Generate and analyse coverage reports to ensure verification of completeness and quality (20%).
- Collaborate with design and architecture teams to understand system requirements and ensure alignment (10%).
- Identify, debug, and resolve verification issues and design bugs (10%).
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of experience in SoC verification.
- Strong hands-on experience with UVM-based verification methodologies.
- Proven experience in defining and executing test and verification plans.
- Experience with coverage-driven verification and coverage analysis.
- Proficiency in SystemVerilog and assertion-based verification.
- Familiarity with industry-standard verification tools (e.g. VCS, QuestaSim).
- Experience with IC design verification at block and SoC level.
- Knowledge of formal verification techniques.
- Experience verifying bus architectures (e.g. AMBA AHB/AXI, NoC, Bus Fabric) in UVM environments.
- Understanding of low-power verification methodologies.
- Strong analytical, debugging, and problem-solving skills.
- Excellent communication and teamwork abilities.
- Strong programming skills in Python.
- Experience in wireless SoC design and verification.
- Knowledge of scripting languages (e.g. Tcl, Python, Perl) for automation.
- Familiarity with version control systems (e.g. Git).
More Info
Job Type:
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Key Skills
UVM-based verification methodologies
IC design verification
QuestaSim
low-power verification methodologies
assertion-based verification
formal verification techniques
coverage-driven verification
About Company
Skills:
Vcs, Git, Perl, Python, Tcl, systemverilog, coverage analysis, IC design verification, QuestaSim, low-power verification methodologies, assertion-based verification, Uvm, coverage-driven verification, formal verification techniques