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Staff Memory Circuit Design Engineer

Staff Memory Circuit Design Engineer

Broadcom
Fresher
Not Disclosed
Early Applicant
  • Posted a month ago
  • Be among the first 10 applicants

Job Description

Job Description:

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience levels.

Available Job Responsibilities

  • Design and build memory or circuit blocks at the gate or transistor level
  • Simulate and analyze the circuit design using transistor level simulators
  • Extract the layout and perform post-layout simulations and verification
  • Floorplan physical implementation and layout integration of design components
  • Integrate characterization flow to extract timing and power information
  • Develop scripts to automate characterization flow, simulations, and verification
  • Specify and verify various behavioral and physical memory models
  • Document the design specifications, behavioral description, and timing diagrams
  • Help specify silicon test plan and correlate silicon to simulation data

Preferred Skills

  • Good understanding of transistor level circuit behavior and device physics
  • Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis
  • Proficiency in running simulators, writing automation scripts, and are tools savvy
  • Understanding of memory behavioral and physical models is a plus
  • Expertise in memory circuit design is a plus
  • Understanding of DFT schemes and chip level integration is a plus
  • Good communication, interpersonal, and leadership skills
  • Motivated, self-driven and good at multi-tasking
  • Passion for solving complex problems and willingness to learn

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Key Skills

memory compilers

DFT schemes

layout integration

behavioral and physical memory models

characterization flow

transistor level simulators

automation scripts

logic cells

custom macros

timing and power information

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