STA Engineer

Job description

• Experience into STA and timing closure/signoff experience with PD domain skill-set/knowledge.
• Candidate should be able to understand the timing constraints, analyze design details, analyze timing reports from prepcts to postcts stages, in-depth concepts of
• Candidate is preferably expert in PT and Tempus tools.

Role: ASIC / RTL / Logic Design Engineer

Industry Type: Electronic Components / Semiconductors

Department: Engineering - Hardware & Networks

Employment Type: Full Time, Permanent

Role Category: Hardware

Education

UG: Any Graduate

PG: Any Postgraduate