Job Description

Key Responsibilities

Lead and execute IP and SoC-level verification using UVM/SystemVerilog methodologies
Develop scalable testbenches and environments aligned with project verification goals
Define and drive coverage-driven and assertion-based verification strategies
Debug complex simulation failures at the testbench and RTL level
Integrate verification IPs and ensure protocol compliance for interfaces like DDR5, HBM3, PCIe Gen6, CXL 3.0
Collaborate with architecture, design, firmware/software, and system validation teams
Drive early software validation with virtual prototypes and emulation platforms
Work on power-aware and DFT verification flows where applicable

More Info

Job Type:

Permanent Job

Industry:

Semiconductor

Role:

Network Administrator

Function:

Employment Type:

Full time

Key Skills

Uvm

systemverilog

SoC Verification

IP verification

coverage-driven verification

constrained-random testing

About Company

Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier.As the industrys leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog Connectivity, and Power.

Last Updated: 10-09-2026 04:16:38 AM