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Software Verification Engineer

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  • Posted 2 months ago
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Job Description

Job Title:

Lead Physical Design Engineer

Location- Hyderabad

Exp- 4+ years

JD:-

  • Good Experience in 65nm and above(actual need is 180nm) with DC- DC converter or buck boost converters, LDOs, Op-Amps and Blocks
  • Allegro is looking for someone who has worked on Digital blocks in AMS projects(NXP/TI) not 100% Digital projects(like AMD/Intel).
  • We want someone working on higher nodes like 140nm, 180nm, 190nm etc.
  • Need to know Digital basics like DFF (D Flipflop) functionality, just the basics is enough.
  • Need to have experience in Cadence tools.
  • Should know DFT insertion and have full chip tape out experience.
  • Need to be able to put a project plan till final tape out.

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Job ID: 126933621

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