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Job Summary:
The engineer will be a part of cross geography team in developing maintainable, high-quality C/C++ code for an HDL language-based compiler and runtime support. Responsibilities include development of HDL compiler front-end for SV, improving compiler performance and infrastructure and flows. Exposure to RTL simulation/synthesis and runtime environment is highly desirable.
Responsibilities :
Cadence is a pivotal leader in electronics and system design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world¢€™s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work Force
Job ID: 115749279
Skills:
CSS, Maven, Cassandra, PostgreSQL, Data structures, Spring Boot, HTML, Sql, Spring, Git, Javascript, Gradle, Docker, MySQL, MongoDB, Kubernetes, Java 8 or higher, Microservices architecture
Skills:
C++, Linux, Software Development, Debugging, data structures, Algorithms, System Design, synthesis optimization, Timing Analysis
Skills:
Verilog, Python, Tcl, Rtl Design, verification environment, synthesis concepts, EDA Tools, design verification methodology, System Verilog Assertions
Skills:
Java, Software Development, Maven, J2ee, Sql
Skills:
Hld, Distributed Systems, Lld, CSS, Angularjs, PostgreSQL, Nodejs, Kafka, HTML, Rabbitmq, Gcp, Reactjs, Sns, Javascript, System Design, AWS, Event-driven architecture, GraphQL APIs, Frontend to backend flow
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