SOC Verification Engineer
SOC Verification Engineer
leadsoc technologies pvt ltd5-15 Years
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Job Description
Job Title: SoC Verification Engineer – Full Chip Verification
Location: Bangalore (Hybrid/Onsite)
Experience: 5–15 Years
Notice Period: Immediate to 30 Days Preferred
Job Description
We are seeking an experienced SoC Verification Engineer with strong expertise in Full Chip Verification to join our verification team. The ideal candidate should have hands-on experience in verifying complex SoCs, developing verification environments, debugging issues, and collaborating with cross-functional teams to ensure high-quality silicon.
Key Responsibilities
- Develop and execute verification plans for complex SoC designs.
- Build and maintain SystemVerilog/UVM-based verification environments.
- Perform Full Chip verification, subsystem integration, and regression testing.
- Develop test cases, sequences, scoreboards, monitors, and functional coverage.
- Analyze and debug simulation failures, protocol violations, and functional issues.
- Work closely with Design, Architecture, Emulation, and Firmware teams to resolve issues.
- Review verification plans, test benches, and code to improve quality and coverage.
- Track verification metrics including code coverage, functional coverage, and assertion coverage.
- Support silicon bring-up and post-silicon debug, if required.
Required Skills
- 5+ years of experience in SoC/ASIC Verification.
- Strong knowledge of SystemVerilog and UVM.
- Experience in Full Chip Verification of complex SoCs.
- Good understanding of SoC architecture and subsystem integration.
- Strong debugging skills using simulation and waveform analysis tools.
- Experience with industry-standard simulators such as VCS, Xcelium, or Questa.
- Knowledge of scripting languages such as Python, Perl, Shell, or Tcl.
- Experience with functional coverage, assertions (SVA), and constrained random verification.
- Familiarity with version control systems such as Git or Perforce.
Preferred Skills
- Experience with ARM-based SoCs.
- Knowledge of AMBA protocols (AXI, AHB, APB, ACE/CHI).
- Experience in low-power verification (UPF/CPF).
- Exposure to emulation or FPGA prototyping.
- Experience with CI/CD and regression automation.
Educational Qualification
- Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.
Notice Period
- Immediate Joiners or candidates who can join within 30 days are preferred.
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Key Skills
About Company
Skills:
Usb, Vcs, DDR, Perl, Pcie, Ethernet, Python, Tcl, Verdi, Uvm, systemverilog, CXL, LPDDR, high-speed protocols
Skills:
arm architecture , C, Ovm, Jtag, Perl, Verilog, Python, System Verilog, CPU architecture, interconnects, Uvm, power management techniques, debug architecture protocols, coherent fabrics, VHDL, SoC Verification, SVTB
Skills:
C, Verilog, Scripting, RTL testbench debug, interconnects, memory hierarchy, Arm-based SoC architecture, Uvm, UPF, systemverilog, coverage closure, coherency
Skills:
C Programming, System Verilog, DSP Image RADAR processing, SOC Chip level Cluster Sub-System Verification, Interconnect NIC FlexNoC Cache Coherency, Uvm, Microcontroller and Microprocessor architecture, ARM Cores
Skills:
C, Shell, Perl, Verilog, System Verilog, Python, Cadence Tools, Xcelium, Uvm, safety simulator, VHDL, vManager, Formal applications