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Role and Responsibilities Responsible for developing test cases for SoC level verification scenarios.Execute Gate level simulations. Responsible for coverage closureSkill Requirements: Good understanding on C and SV environment, Hands on experience in SV/UVM based testbench development.Good understanding of system level scenarios in ARM based SoC.Basic knowledge in Bus protocols-APB,AHB,AXI Experience in debugging gate level simulations, low power simulations Good to have: Scripting knowledge in Python/Perl Qualifications: B.Tech/B.E/M.Tech/M.E
Bachelor Of Technology (B.Tech/B.E), Masters in Technology (M.Tech/M.E)
HighPoints Technologies India Private Limited
Job ID: 151263521