SOC DFT Engineer
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Job Description
SoC DFT Engineer
Job Description:
- Scan insertion.
- SCAN DRC/Coverage debug.
- ATPG Pattern generation.
- Gate level simulations ( Zero delay/Timing Delay simulations).
- Worked on JTAG/P1500 protocols.
- Perl/Tcl scripting.
- Timing/Formal verification/PD flow knowledge is plus.
Location: Bangalore
Notice Period: Immediate
Experience: 5+ Years
More Info
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Key Skills
PD flow knowledge
ATPG Pattern generation
Timing Formal verification
SCAN DRC Coverage debug
JTAG P1500 protocols
Gate level simulations
Zero delay Timing Delay simulations
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