Develop SoC architecture and Architecture specifications that meet current and future computing requirements for AI/ML roadmap.
Evaluate different silicon solutions for executing Google's data center AI accelerator roadmap: off-the-shelf components, vendor co-developments, custom designs, and chiplets.
Collaborate with Systems and Software teams to create high performance hardware/software interfaces.
Collaborate with design, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
Evaluate power, performance, area tradeoffs and drive improvements across generations.
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in architecture of machine learning or graphics SoCs.
8 years of experience with performance, power, area, cost tradeoff analysis for multi chiplet SoC architectures.
Experience with ASIC design flows, from specification to production.
Preferred qualifications:
Experience in SoC designs, RTL coding and integration flows.
Experience working with software teams optimizing the hardware/software interface.
Experience in estimating performance by analysis and modeling, and experience in defining and driving performance test plans.
Experience in a procedural programming language (e.g., C++, Python, Go).
Knowledge of high performance and low power design techniques.
Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies.
