Senior VLSI Physical Design Engineer

LatchQ Semiconductor Pvt Ltd is a technology services company specializing in technology consulting and staffing. With deep domain expertise, LatchQ delivers top-tier design verification solutions tailored for optimal outcomes. The company is dedicated to fostering a healthy work-life balance and values a passionate workforce committed to excellence. LatchQ continuously seeks innovative professionals to join its team and contribute to its mission of delivering high-quality solutions.

We are seeking a full-time Senior VLSI Physical Design Engineer to join our on-site team in Bengaluru South. The role involves end-to-end execution of physical design tasks such as synthesis, floorplanning, placement, clock tree synthesis (CTS), routing, optimization, static timing analysis (STA), power analysis, and physical verification. You will work closely with cross-functional teams to ensure the successful tape-out of high-performance semiconductor designs.

• Expertise in Physical Design flows, including synthesis, floorplanning, placement, CTS, routing, and optimization.
• Proficiency in Static Timing Analysis (STA), timing closure, and power analysis methods.
• Strong knowledge of design tools such as Cadence, Synopsys, or Mentor Graphics for physical verification and layout optimization.
• Solid understanding of RTL-to-GDSII flow and hands-on experience with physical design process steps such as DFT, IR/EM analysis, and signal integrity.
• Proficiency in scripting languages such as TCL, Perl, or Python for process automation and efficiency improvements.
• Strong problem-solving skills, attention to detail, and the ability to work collaboratively in a team environment.
• Bachelor's or Master's degree in Electronics, Electrical Engineering, or a related field.
• Experience working on advanced technology nodes such as 5nm, 7nm, or 10nm is an added advantage.