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Senior Synthesis Engineer

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Job Description

Senior Synthesis Engineer

Experience Level :- 3yrs to 6yrs

Notice Period :- Immediate to 45 Days

Work Location :- Bangalore

Job Description – Senior Synthesis Engineer (VLSI)

  • Worked on 7nm/5nm/Future sub-micron Technologies.
  • Hands on experience in Physical Synthesis with Multi corner & Multi-mode, Low Power, Performance and Area Goal using Fusion Compiler or Genus.
  • Hands on experience in Logic equivalence check and low power check debugging and clean up using Conformal LEC or Formality.
  • Familiar with pre-STA timing analysis using Primetime or Tempus.
  • Familiar with low power check using Conformal Low Power or VCLP tool.
  • Experience in verifying constraints quality and completeness.
  • Understanding of UPF & Low power concepts.
  • Familiar with functional ECO flow and implementation.
  • Familiar with DFT Insertion and debugging basic DFT issues.
  • Co-work with RTL, DFT and PD engineers to meet PPA targets.
  • Well versed with TCL/Perl/Shell script.
  • Self-starter and highly motivated.
  • Strong debugging, initiative and analysis/problem solving skills.
  • Minimum 3+ years of experience in Synthesis and Physical Synthesis

Mode of Work :- WFO

Employment Type :- Permanent

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Job ID: 153648265

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Bengaluru, India

Skills:

rtl development ClpTclPythonPerlMemory BIST insertionUPF developmentLow power checksSynopsys Prime TimeSynthesis LECCadence Conformal Low Powerclock gatingGenus Fusion CompilerRTL LintPhysical DesignCadence Conformal LECSynopsys DCGConstraints validationDRCpower optimization flowsTCL script developmentDftMemBIST

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