Hi Greetings!!
Immediate hiring for permanent role of leadsoc technologies Pvt Ltd_ Senior Synthesis Engineer
Please find the below JD.
Senior Synthesis Engineer – Detailed Job Description
Job Title: Senior Synthesis Engineer
Experience: 5–10 Years
Location: Bangalore
Employment Type: Full-Time
About the Role
We are looking for a highly motivated Senior Synthesis Engineer with hands-on experience in ASIC RTL-to-Gate synthesis, timing optimization, and low-power implementation. The ideal candidate will work closely with RTL, Physical Design, DFT, and STA teams to achieve timing, area, and power (PPA) targets while ensuring high-quality netlist delivery.
Key Responsibilities
- Perform RTL synthesis using Synopsys Design Compiler (DC/DCG) or Cadence Genus.
- Optimize designs for Performance, Power, and Area (PPA).
- Develop, review, and maintain SDC timing constraints.
- Analyze synthesis reports and resolve timing, area, and power issues.
- Work closely with STA teams to achieve timing closure across multiple modes and corners (MMMC).
- Perform Logic Equivalence Checking (LEC) using Synopsys Formality or Cadence Conformal.
- Support low-power implementation using UPF/CPF methodologies.
- Collaborate with Physical Design teams to resolve synthesis-related issues and improve design quality.
- Analyze and fix setup/hold timing violations.
- Participate in design reviews and support project execution through tape-out.
Required Skills
- Strong understanding of the complete ASIC Design Flow.
- Hands-on experience with:
- Synopsys Design Compiler (DC/DCG)
- Cadence Genus
- PrimeTime
- Formality or Conformal LEC
- Experience with advanced technology nodes such as 16nm, 7nm, 5nm, or 3nm.
Preferred Qualifications
- BE/B.Tech/M.Tech in Electronics, VLSI, Electrical, or related discipline.
- 5–10 years of relevant ASIC Synthesis experience.
- Strong debugging and problem-solving skills.
- Excellent communication and collaboration abilities.
Interested candidates can send updated resumes to [Confidential Information]
