Senior Staff Manager

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Marvell is empowering the global data economy. Whether at the network core or edge, our leadership technologies make it possible for the world's data to be processed, moved, stored and secured faster and more reliably. With leading intellectual property and deep systemlevel knowledge, Marvell's infrastructure semiconductor solutions are transforming the 5G, cloud computing, enterprise and automotive markets of tomorrow. Marvell Compute and Custom Solutions has been at the forefront of developing and delivering leading edge, high-performance data processing silicon platforms. By delivering a stream of technical innovations through a diverse set of fast-growing product lines, Marvell technology is powering the next-generation data processing and workload acceleration platforms for multiple market segments.

What You Can Expect

The CAD Manager will lead and manage a team of around 10 CAD engineers/contractors towards design automation environment for semiconductor product development. This role ensures that engineering teams have robust CAD tools, design flows, and methodologies to support IC design, verification, and tape-out. The CAD Manager will collaborate with design engineers, EDA vendors, and IT teams to optimize workflows, maintain tool infrastructure, and enforce design standards across the organization.

Key Responsibilities
CAD Tool & Infrastructure Management

• Administer and maintain EDA tools (e.g., Cadence, Synopsys, Mentor Graphics).
• Manage license servers, tool installations, and upgrades.
• Coordinate with IT for compute farm, storage, and high-performance computing requirements.
• Coming up with Design & Verification Flows & Methodologies and enhancing them periodically for uniformity across projects, efficiency improvement.
• Develop, implement, and maintain design flows for front-end (RTL, synthesis, Verification etc) and back-end (place & route, DRC/LVS, timing closure).
• Ensure compatibility and integration across tools and processes.
• Automate repetitive tasks using scripts (Perl, Python, TCL).

Standards & Quality Assurance

• Define and enforce CAD standards, naming conventions, and version control practices.
• Conduct audits of design databases to ensure compliance with foundry requirements.
• Support tape-out preparation and sign-off flows.
• Team Support & Training
• Provide technical support to design engineers for CAD/EDA-related issues.
• Train engineers on new tools, flows, and methodologies.
• Act as liaison with EDA vendors for tool evaluation and issue resolution

Process Improvement

• Identify bottlenecks in design flows and propose optimizations.
• Evaluate emerging EDA technologies and recommend adoption.
• Drive continuous improvement initiatives for productivity and efficiency
  

What We're Looking For

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 14+ years of experience in semiconductor design and CAD/EDA tool management.
• Strong expertise in industry-standard EDA tools (Cadence Virtuoso, Synopsys ICC2, Mentor Calibre, etc.).
• Proficiency in scripting languages (Python, Perl, TCL, Shell).
• Solid understanding of semiconductor design processes (RTL-to-GDSII, verification, DFM).
• Experience with version control systems (Git, Perforce).
• Excellent problem-solving, communication, and leadership skills
• Preferred Skills:
• Familiarity with advanced nodes (e.g., 5nm, 3nm, 2nm) and foundry requirements.
• Knowledge of cloud-based EDA environments.
• Experience in managing compute farms and job schedulers (LSF, Slurm).
• Eposure to machine learning applications in EDA is a plus.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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