Senior Staff Engineer
- Posted a month ago
- Be among the first 10 applicants
Job Description
We are seeking a highly motivated Physical Design Engineer to drive the physical implementation and timing closure of complex, low-power SoCs targeted for the IoT and MCU markets. The ideal candidate will play a key role in achieving design objectives related to area, performance, and power while ensuring high-quality silicon implementation.
Your role
Key responsibilities in your new role :
Qualifications And Skills To Help You Succeed
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in
We are on a journey to create the best Infineon for everyone.
We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.
Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply.
Please let your recruiter know if you need any accommodations during the interview process.
Learn more about our various contact channels and about Diversity & Inclusion at Infineon.
Anand Rawal
Your role
Key responsibilities in your new role :
- Drive physical design and timing closure activities for hierarchical blocks and full-chip SoC designs, meeting aggressive area, performance, and power (PPA) targets.
- Own and execute various stages of the physical design flow, including:
- Floorplanning and I/O planning
- Package co-design
- Power grid design
- Placement and routing
- Clock Tree Synthesis (CTS)
- Timing optimization and closure
- Static and Dynamic IR drop analysis
- Physical verification and signoff checks
- Implement and optimize low-power design methodologies, including designs with multiple voltage domains, power islands, and advanced power-reduction techniques.
- Collaborate closely with cross-functional teams to ensure seamless integration of package, design, and implementation requirements.
- Develop, enhance, and drive physical design methodologies and automation flows to continuously improve Quality of Results (QoR), productivity, and design efficiency.
- Analyze and resolve complex implementation challenges while ensuring design robustness, scalability, and manufacturability.
- Contribute to best practices, technical innovations, and continuous improvements within the physical design organization.
- Strong hands-on experience in end-to-end physical design and timing closure for advanced SoCs.
- Deep understanding of low-power implementation techniques, including multiple voltage and power domains.
- Good knowledge of I/O planning and package co-design considerations.
- Proven ability to drive design closure and improve QoR through methodology and flow enhancements.
- Self-driven, detail-oriented, and capable of working effectively in a collaborative team environment.
Qualifications And Skills To Help You Succeed
- Bachelor's or Master's degree in Electronics Engineering, Microelectronics, VLSI Design, or a related field.
- Hands-on experience in SoC physical design, including floorplanning, placement, clock tree synthesis (CTS), routing, and timing closure.
- Strong experience with industry-standard EDA tools for physical design, verification, and signoff.
- Proficiency in scripting and automation using Shell, Perl, Tcl, and Make-based flows.
- Solid understanding of advanced semiconductor technology nodes (40nm, 28nm, and 22nm) and the associated physical design challenges.
- Strong analytical and problem-solving skills with the ability to identify, debug, and resolve complex design issues.
- Demonstrated commitment, ownership, and determination in delivering high-quality results within the area of expertise.
- Well-organized, methodical, and detail-oriented approach to work.
- Proactive mindset with the ability to take initiative and overcome challenges through creativity and innovation.
- Strong team player with excellent collaboration and interpersonal skills.
- Ability to effectively coordinate with cross-functional teams and actively share knowledge and expertise with colleagues.
- Excellent communication skills with the ability to share information comprehensively, accurately, and effectively.
- Passion for continuous learning, professional development, and exploring new technologies and methodologies.
- Exposure to low-power design methodologies and physical verification flows.
- Experience working in a fast-paced, collaborative semiconductor product development environment.
- Ability to drive design closure while meeting performance, power, area (PPA), quality, and schedule targets.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in
We are on a journey to create the best Infineon for everyone.
We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.
Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply.
Please let your recruiter know if you need any accommodations during the interview process.
Learn more about our various contact channels and about Diversity & Inclusion at Infineon.
Anand Rawal
More Info
Job Type:
Industry:
Function:
Employment Type:
Key Skills
Physical verification and signoff checks
Timing optimization and closure
EDA tools for physical design verification
Low-power design methodologies
Static and Dynamic IR drop analysis
Package co-design
Placement and routing
Power grid design

