Senior Staff Engineer - DFT
Senior Staff Engineer - DFT
BitSilica10-12 Years
- Posted 22 hours ago
- Be among the first 10 applicants
Job Description
- 10+ yrs of experience in DFT architecture, scan Insertion, compression at core level and SoC level.
- Experience in ATPG pattern generation, coverage analysis
- Experience with timing and no-timing simulations
- Experience in Memory-BIST
- Have understanding of SSN architecture, clock architecture, OCC
Location: Bangalore
More Info
Key Skills
Memory-BIST
DFT architecture scan Insertion compression at core level and SoC level
SSN architecture
timing and no-timing simulations
clock architecture
ATPG pattern generation coverage analysis
About Company
Skills:
DFT architecture, coverage analysis, Memory-BIST, ATPG pattern generation, compression at core level, Scan Insertion, SSN architecture, clock architecture, timing simulations, no-timing simulations, occ