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Company Description Chiplogic Technologies (Chiplogic) is an IP and product engineering services company founded in 2018, specializing in semiconductor, systems, IoT, and AI/ML domains. The organization delivers high-quality, dependable services ranging from concept-to-silicon semiconductor design to full turnkey system solutions. Chiplogic provides ODC (Offshore Development Center) models and proof-of-concept (POC) development for complex designs and emerging technologies. The company also offers IoT end-system solutions and AI/ML services built around its proprietary VISARD™ (Video Synthesis And Real-time Dynamics) framework. Team members collaborate on cutting-edge projects that span multiple technology areas and industry applications.
Role Description The Senior SOC Verification Engineer will be responsible for planning, developing, and executing verification strategies for complex SOC designs, ensuring functional correctness and performance requirements are met. Day-to-day activities include creating test plans, building verification environments, writing and running test cases, analyzing coverage, and driving closure of verification metrics. The role involves close collaboration with RTL design, validation, and firmware teams to debug issues, refine specifications, and improve overall design quality. The engineer will contribute to methodology improvements, mentor junior team members, and support tape-out readiness through rigorous verification sign-off. This is a full-time, on-site role based in Bengaluru.
Qualifications
Job ID: 150857129
Skills:
Mac, Switch, Pcie, 1G Ethernet, UFS, SV, XUSB, High Speed IO verification, verification tools for simulation and debug, Uvm
Skills:
Usb, Jtag, Pcie, Perl, Ethernet, Python, System Verilog, UVM methodology, Design for Debug, scripting in Linux Unix environments, SoC architecture verification, TSN, ARM based SoC verification, High speed USB
Skills:
Bitbucket, Vcs, JIRA, Tcl, Verilog, Python, Perl, Git, Questa, Assertions, Uvm, Protium, systemverilog, Xcelium, CVS, RTL-to-Gate-Level Simulation, SoC Verification, Zebu, HAPS, Palladium, Gate-Level Simulation
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