Physical Design Engineer (5+ Years Experience)
Position: Physical Design Engineer
Experience: 5+ Years
Locations: Bangalore / Hyderabad / Chennai / Pune / Noida / Ahmedabad
Job Description:
We are looking for experienced Physical Design Engineers with strong expertise in end-to-end physical design implementation flow for advanced SoC projects.
Key Responsibilities:
- Block-level physical design implementation from Netlist to GDSII
- Floorplanning, Placement, CTS, Routing, and Timing Closure
- Handling STA, SI, IR Drop, and EM analysis
- Physical verification including DRC, LVS, and ERC checks
- Low-power implementation and UPF awareness
- ECO implementation and timing closure support
- Interaction with RTL, DFT, STA, and Sign-off teams
- Debugging timing and physical violations and driving closure
Required Skills:
- Strong hands-on experience in PnR flow
- Expertise in Cadence Innovus / Synopsys ICC2
- Experience with PrimeTime / Tempus for timing analysis
- Exposure to advanced technology nodes (16nm / 7nm / below) preferred
- Knowledge of MCMM concepts
- Strong understanding of power planning and clock tree synthesis
- Scripting knowledge in TCL / Python is an advantage
Good to Have:
- Experience in hierarchical/top-level integration
- Exposure to low-power design techniques
- Experience with sign-off tools like Calibre / Pegasus / RedHawk
Qualification:
- B.Tech / M.Tech in Electronics / VLSI / Electrical Engineering
How to Apply:
Interested candidates can share their updated resume at [Confidential Information]
