Search Jobs

Search by job, company or skills

Senior Physical Design Engineer

Senior Physical Design Engineer

ALTEN Calsoft Labs
Early Applicant
  • Posted a month ago
  • Be among the first 10 applicants

Job Description

Senior Physical Design Engineer- PNR

Experience: 4 to 8 Years

Location: Hyderabad

Job Description

• Technology nodes and workflow support: The engineers will support Place and Route workflows for designs at 6nm, 3nm, and 2nm technology nodes, including qualifying tool versions, deploying new features, and updating workflows to incorporate new capabilities.

• Required skills and tools: Candidates must be proficient with tools such as Synopsys Fusion Compiler, Cadence Innovus, and Cerebrus. They should have a strong understanding of low power flows and be skilled in scripting languages like PERL, TCL, and Python, along with experience in synthesis, Place and Route workflows, STA, and physical verification tools.

• Job deliverables: Responsibilities include PnR flow qualification and support, running multiple PnR blocks for benchmarking, PPA push and design correlation with STA, EMIR, and PDV signoff flows.

• Qualifications and logistics: Positions require 4 to 7 years of experience, a BTech/MTech/BE/ME qualification

More Info

Job Type:
Function:
Employment Type:

Key Skills

Cerebrus

physical verification tools

Cadence Innovus

Place and Route workflows

Synopsys Fusion Compiler

About Company

Similar Jobs

5-7 yrs
Hyderabad, India
Skills:
Routing, Physical Verification, Physical Design, EDA Tools, floorplanning, Placement, Timing Closure, DRC, LVS
8-12 yrs
Hyderabad, India
Skills:
Block level and Top-level physical implementation, Place and Route processes, Physical Design, Synthesis for high-speed designs
8-12 yrs
Hyderabad, India
Skills:
Block level and Top-level physical implementation, Place and Route processes, Synthesis for high-speed designs, Physical Verification, Physical Design for complex Chiplets, Unix/Linux environment
4-6 yrs
Hyderabad, India
Skills:
Routing, power analysis, Synthesis, EMIR, floorplanning, Placement, Physical Design Implementation, Power Planning
4-8 yrs
Hyderabad, India
Skills:
static timing analysis, routing, Innovus, LVS, Parasitic Extraction, Fusion Compiler, DRC, Placement, floorplanning, Clock Tree Synthesis, ICC2