Collaborating with software developers across divisions to architect low-latency connections to financial exchanges around the world
Building advanced Ethernet-based communication stacks direct from chip to SFP
Integrating network stacks to connect to various financial exchanges
Creating custom logic to manage a constant inflow of data, which will need to be parsed, processed, and passed to the user space in the most efficient manner possible
Working closely with software developers to develop an optimal interface between FPGA hardware and user space software
Qualifications
A bachelor's degree in electrical engineering, or equivalent professional experience
At least 5 to 10 years of experience with ASIC and/or FPGA development
Verilog or System Verilog programming
ASIC development via VHDL or Verilog experience will qualify for the position
Expert-level knowledge of FPGA products (Xilinx preferred), development tools, and related simulators
Experience with Ethernet protocols, PCIe, and/or switching and routing in network equipment, parsing and traffic shaping.
Verification skills using cocotb, formal verification and UVM recommended
Experience in FPGA design flow including synthesis, place & route, static timing analysis.
A strong understanding of network PHY interfacing
Integration experience with independent third-party cores
Able to design and develop signal processing cores from system and architectural requirements
Ability to document design and interface specifications
Experience in Linux environment
Comfortable with shell scripting and one or more common scripting languages (e.g. Python)
Additional Qualifications
A demonstrated background in 100Mbps, 1Gbps, 10Gbps and 40Gbps network interfaces (preferred)
An understanding of various network hardware techniques, such as store and forward (preferred)
Previous work experience at a high-frequency trading firm (preferred)
Experience with collaborating in a global team environment across regions and time zones (plus)
