Senior Engineer

SmartSOC is looking for EMIR / Power Integrity Engineers with strong hands-on experience in EM/IR analysis, RedHawk-SC, and Power Grid (PG) design/specification. The role involves analyzing EMIR issues, driving convergence, and working closely with Physical Design teams to achieve full-chip/block-level signoff.

Key Responsibilities

• Perform EM/IR analysis and signoff for complex SoC/ASIC designs using RedHawk-SC.
• Analyze Static/Dynamic IR Drop, Electromigration, and current-density violations.
• Perform root-cause analysis of EMIR violations and identify appropriate corrective actions.
• Validate PnR databases, PG connectivity, power structures, and EMIR inputs.
• Drive EMIR convergence in collaboration with Physical Design teams.
• Provide ECO recommendations for PG strengthening, via optimization, placement/routing changes, and other design fixes.
• Define, review, and validate Power Grid (PG) specifications based on design power and reliability requirements.
• Correlate EMIR issues with placement, routing, power, and timing to identify root causes.
• Support block and full-chip EMIR signoff closure.
• Work closely with Physical Design, STA, Power, and Physical Verification teams throughout signoff.

Must-Have Skills

• 3–12 years of relevant experience in EMIR / Power Integrity / ASIC signoff.
• Strong hands-on experience in EMIR analysis and convergence.
• RedHawk-SC experience is mandatory.
• Strong understanding of IR Drop, Electromigration, current density, and power integrity.
• Experience in PG Grid specification, analysis, and validation.
• Hands-on experience with EMIR debugging and signoff closure.
• Ability to provide effective ECO guidance to PnR teams.
• Good understanding of ASIC Physical Design and signoff flows.

Good to Have

• Basic understanding of STA concepts.
• Exposure to DRC/LVS and Physical Verification.
• Experience with Multi-Voltage / Multi-Power-Domain designs.
• Knowledge of UPF/CPF.
• Scripting experience in Tcl / Python / Perl / Shell.