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Job Description
About the AES Automation Team
The AES Automation Team sits within Microchip's Advanced Engineering Services (AES) organization. We focus on flow improvement, technical advising, and driving PPA and TTM gains across digital design and physical implementation teams. We partner closely with product design and CAD groups to deliver best-in-class silicon solutions. Our shift-left initiative is evolving — we're now actively exploring how
AI and intelligent automation can accelerate design quality and time-to-market. If you want to be part of a team that's defining what the future of chip design workflows looks like, this is the place.
Why This Role
You won't just follow a flow — you'll help
reinvent it. As part of Microchip's AES Automation Team, you'll be at the forefront of our
shift-left initiative: moving critical design implementation work earlier in the development cycle so problems get caught sooner, designers stay unblocked, and silicon gets to market faster.
But here's what makes this role different:
we're actively exploring how AI and automation can transform the way chip design gets done — and you'll be a driving force behind that. From intelligent automation of repetitive tasks to AI-assisted analysis and decision-making, you won't just use these technologies — you'll help decide
where,
how, and
whether they're applied to real design workflows.
This is a high-visibility, cross-functional role where your work directly improves
power, performance, and area (PPA) outcomes across products. TODO and TTM. You'll partner with RTL designers, physical implementation engineers, and DFT teams — not as a support function, but as a
technical co-owner of design quality and process innovation.
If you enjoy solving problems early (before they become expensive TODO and stressful we have a more relaxed team than traditional project-centric teams), pushing the boundaries of what's possible with new technology, and working across disciplines — this role was made for you.
What You'll Do
- Explore and champion AI-driven improvements — identify opportunities where AI, machine learning, or intelligent automation can augment design workflows. Prototype new approaches, evaluate results, and help the team adopt what works. Whether it's streamlining repetitive tasks, building smarter analysis flows, or rethinking how we work end-to-end — you'll have the freedom to experiment and the support to take ideas from concept to production.
- Drive process innovation — find opportunities to increase efficiency, parallelize tasks, and reduce manual effort for designers through scripting, AI-assisted tooling, or process redesign. Document lessons learned, best practices, and recommendations for future projects.
- Collaborate across teams — work closely with RTL designers, physical design, CAD, and DFT engineers to catch and resolve synthesis, constraint, and timing issues early.
- Mentor and grow the team — train team members on early-stage implementation flows, tools, and emerging AI/automation techniques. Help define and document new processes.
- Communicate globally — provide clear written updates and participate in regular online meetings with distributed teams.
- Grounded in real design work — your innovation will be rooted in hands-on implementation experience. Day-to-day, you'll work on activities like trial synthesis, SDC (timing constraint) creation and review, checklist and ticket management, process compliance, and reviewing STA results and warnings to provide actionable technical guidance to design teams. TODO its more that we will use the tools we build to validate them, and then train others to use them to take over. We do the work because we want to build the best flows possible
Requirements/Qualifications
What You Bring
Must-haves
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
- Solid understanding of digital design fundamentals: RTL (SystemVerilog), synthesis, and SDC timing constraints
- Scripting ability in at least two of: Python, TCL, shell, Perl
- Hands-on experience with synthesis tools (e.g., Genus or equivalent)
- A track record of taking ownership of technical problems and driving them to resolution
- Clear communication skills — written and verbal — for working across time zones and cultures
Nice-to-haves (any of these strengthen your application — curiosity counts as much as experience):
- Interest or hands-on experience in applying AI to engineering workflows — e.g., using AI chatbots or autocomplete to produce scripts, or CLI coding tools such as Claude Code, Codex, or OpenCode
- Familiarity with AI/ML tools and concepts (e.g., LLM APIs, prompt engineering, RAG pipelines, AI agents, skill/workflow creation)
- Experience with flow/process improvement or shift-left methodologies
- Experience with other EDA tools (e.g., Conformal LEC/CLP, Spyglass CDC, Joules, HAL, Fishtail, or equivalents)
- Familiarity with DFT concepts and logic equivalence checking (LEC)
- Exposure to power estimation with vectors or UPF (Unified Power Format)
- Experience mentoring or training other engineers
What You'll Get
- A seat at the table for AI-driven innovation — you won't just hear about AI transforming chip design; you'll be one of the people making it happen
- New, in-demand skills — build hands-on AI/ML and automation expertise applied to real silicon design problems, not just toy examples
- A role with real ownership and impact — your work shapes how design gets done across the organization
- Exposure to a wide range of IP and product designs, not just one block
- A collaborative, low-ego team culture that values experimentation and continuous improvement
- Opportunities to grow technically and as a leader through mentoring and process ownership
- Visibility across design, physical implementation, and CAD teams
Travel Time
0% - 25%
To all recruitment agencies:
Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
