Senior Engineer - DFT
Senior Engineer - DFT
Quest Global- Posted a month ago
- Be among the first 10 applicants
Job Description
Job Requirements
Designation: DFT-Engineer/Sr. Engineer/Lead
Experience:35
Location: Bangalore
Work Experience
DFT - SSN | Scan | ATPG | MBIST | GLS | SDC |
Must have SSN experience for minimum of 2 Blocks/Partitions
Designation: DFT-Engineer/Sr. Engineer/Lead
Experience:35
Location: Bangalore
Work Experience
DFT - SSN | Scan | ATPG | MBIST | GLS | SDC |
Must have SSN experience for minimum of 2 Blocks/Partitions
More Info
About Company
Skills:
test mode timing constraints definition, Genus Synopsys, DFT concepts, Scan Insertion, Transition delay test coverage analysis, TetraMax, equivalence check DFT DRC rules, simulating test vectors, ATPG coverage analysis, Cadence Encounter Test, DFTMax, timing fixes corrective actions for timing violations, ASIC DFT
Skills:
Perl, Python, Logic Design, DFT Engineering, Uvm, Architecture Verification, Testplan Development, IOBIST Test-logic, Industry-standard Verification Flows, Constrained Random Testing, Automation Flow Development, Profiling Tools, Pre-Silicon Simulation and Debug, Coverage Metrics
Skills:
DFT strategies, Tessent, EDA Tools, ATPG pattern generation, MBIST, Cadence, Synopsys, IJTAG, Scan compression
Skills:
Memory BIST, TetraMax, DRC Coverage, SSN, occ, Dft, ICL, Scan Insertion, ATPG, pdl, Debug, Simulation, Sms, Synopsys, IJTAG
Skills:
Scan, HDLs, MBIST, DFT architecture definition, Tempus, ATPG flow implementation, scripting skills in Perl, Genus, tessent DFT, JTAG boundary scan, Cadence digital implementation tools