Senior Engineer

shielding , power integrity , creepage and clearance rules, relevant PCB design standards and guidelines including IPC standards, differential pairs, design-for-manufacturing, PCB technologies manufacturing processes, layer stack-ups, EMC-oriented layout grounding concepts, high-speed signal routing, filtering, design-for-test, thermal design principles, controlled impedance, production documentation practices, Signal Integrity, PCB design tools such as Altium Designer, design-for-assembly, Cadence Allegro

synplify , C, Shell, Verilog, Tcl, System Verilog, Python, ZeBU, Vivado, quartus, VHDL, HAPS, Palladium, Xilinx FPGAs, Veloce

static timing analysis, Perl, Verilog, System Verilog, Python, Tcl, Rtl Design, formal verification tools, synthesis tools, low-power design techniques

Spi, C, multi-threading, Python, Pcie, Perl, Os Internals, data structures, GPU architecture, Adaptive AUTOSAR, MCALs, memory management techniques, CDD, inter-process communications, SWC, Vector EB tools, Autosar

synplify , C, Shell, Tcl, Verilog, System Verilog, Python, FPGA-based prototyping, Vivado, quartus, VHDL, Zebu, HAPS, Palladium, Veloce