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RTL Design Engineer
HCL TechBee

RTL Design Engineer

HCL TechBee
5-7 Years
Not Disclosed

This job is no longer accepting applications

Job Description

Job Summary:

We are looking for a talented and experienced RTL Design Engineer to join our team and play a key role in the design and development of next-generation ASICs/SoCs. You will be responsible for all aspects of RTL design, from concept to RTL coding, verification, and integration.

Responsibilities:

  • Develop RTL code for complex digital circuits using Hardware Description Languages (HDLs) such as Verilog or VHDL
  • Perform functional verification using simulation and formal methods
  • Participate in code reviews and ensure adherence to coding standards
  • Analyze timing performance and perform static timing analysis (STA)
  • Collaborate with design, verification, and synthesis teams to ensure successful tape-out
  • Stay up-to-date with the latest RTL design methodologies and tools

Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus)
  • 5-7 years of experience in RTL design for ASICs/SoCs
  • Proven experience in designing and verifying complex digital circuits
  • Proficiency in Verilog or VHDL
  • Experience with verification methodologies (e.g., UVM)
  • Strong understanding of digital design concepts (combinational logic, sequential logic, state machines)
  • Experience with SDC (Standard Delay Constraint) format for timing closure
  • Experience with scripting languages (e.g., Python, Perl) is a plus
  • Excellent communication, teamwork, and problem-solving skills

Benefits:

  • Competitive salary and benefits package
  • Opportunity to work on cutting-edge technologies
  • Collaborative and fast-paced work environment
  • Potential for professional growth and development

More Info

Job Type:
Permanent Job
Industry:
Other
Function:
Engineering
Employment Type:
Full time

Key Skills

VHDL
Uvm
Verilog
Python
Perl

About Company

Last Updated: 27-08-2026 03:56:43 AM

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