Position Overview
We are seeking an experienced and highly driven
Program Manager with strong expertise in the VLSI semiconductor domain and Full Chip programexecution. The ideal candidate will be responsible for driving end-to-end program management across complex SoC/ASIC development cycles, ensuring successful execution of full-chip projects from planning through tape-out.
This role requires strong technical understanding of semiconductor design flows, cross-functional coordination capabilities, stakeholder management, risk mitigation, and execution ownership in high-performance engineering environments.
Key Responsibilities
- Lead and manage end-to-end Full Chip / SoC programs across multiple engineering teams.
- Drive execution planning, scheduling, tracking, and delivery of semiconductor projects.
- Coordinate with RTL, Verification, Physical Design, DFT, STA, Power, Packaging, and Post-Silicon validation teams.
- Manage chip development milestones including architecture freeze, RTL freeze, netlist freeze, tape-out, and silicon bring-up.
- Track program risks, dependencies, bottlenecks, and mitigation plans proactively.
- Work closely with engineering leadership to ensure alignment on timelines, priorities, and deliverables.
- Drive cross-functional communication between internal teams, external vendors, and customers.
- Monitor project health, resource allocation, and execution efficiency.
- Ensure adherence to quality, schedule, and cost objectives.
- Conduct regular program reviews, status reporting, and executive updates.
- Support process improvements for program execution methodologies and operational excellence.
Requirements
Required Skills & Qualifications
- Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, Semiconductor Engineering, or related field.
- 10+ years of experience in semiconductor/VLSI program management or technical project management.
- Strong understanding of Full Chip / SoC development lifecycle.
- Experience managing large-scale ASIC/SoC programs from specification to tape-out.
Strong exposure to:
- RTL Design
- Verification
- Physical Design
- DFT
- STA
- Power Analysis
- Silicon Validation
- Good understanding of semiconductor design methodologies and chip integration flows.
- Proven experience handling cross-functional global engineering teams.
- Strong expertise in project planning, scheduling, execution tracking, and risk management.
- Excellent communication, stakeholder management, and leadership skills.
- Ability to manage multiple parallel deliverables in fast-paced environments.
Preferred Skills
- Experience with advanced technology nodes (7nm/5nm/3nm).
- Exposure to AI/ML accelerator, Networking ASIC, CPU/GPU, or High-Performance Compute designs.
- Familiarity with semiconductor development tools and workflows.
- Experience working with offshore/onshore engineering teams.
- PMP/Agile/Scrum certification is an added advantage.
- Exposure to customer-facing program management activities.
