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Principal Engineer, Virtual Prototype Modelling

Principal Engineer, Virtual Prototype Modelling

Renesas
5-11 Years
Not Disclosed
Early Applicant
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  • Posted 27 days ago
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Job Description

Key Responsibilities

  • Develop high-fidelity SystemC / TLM 2.0 models of:
  • Processors, Cache Controllers, Interconnects, Peripherals, NPUs, ISPs
  • Build and integrate full SoC/system virtual prototypes for early firmware/software development.
  • Port RTOS/Linux onto the virtual platform and develop associated device drivers.
  • Create regressable self-checking test suites using C / ARM Assembly.
  • Verify models at IP and SoC levels using simulation and coverage metrics.
  • Define and deploy system-level simulation flows and methodologies using VP.
  • Collaborate with firmware/software teams to support virtual platform usage and debug.

Key Skills

TLM 2.0

Object-Oriented Programming (OOP)

About Company

Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier.As the industrys leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog Connectivity, and Power.

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