PRINCIPAL ENGINEER/MTS, FECOS CPIE DEVICE

Job Responsibilities

• Enable technology ramp in high-volume production for CMOS and memory devices.

• Improve device performance with a focus on variability reduction and robustness.

• Support and execute design and test optimisation to enhance manufacturability and performance.

• Identify and implement process simplification and working methodology improvements.

• Lead or actively contribute to cross-functional problem-solving for device, yield, and quality issues.

Job Requirements

• Minimum 5 years of relevant working experience is required. A master's or Ph.D. degree in Physics or Engineering areas is preferred.

• Working experience in wafer fab process or process integration engineering. Direct experience in advanced CMOS device technology such as FinFET or GAA is preferable.

• Proven knowledge in semiconductor physics and understanding of transistor operations, scaling limitations and reliability, basic knowledge of CMOS circuits and characterisation methods.

• Understanding of wafer fabrication process areas, including tool sets, process mechanisms, tuning knobs, etc.

• Excellent data analysis skills using software (JMP, SPOTFIRE, etc).

• Strong task ownership, self-motivated to work with other team members to make progress collaboratively.

• Open-minded attitude to learn new skills and could adapt to a new working environment swiftly.

• Good digital literacy with MS Office. Programming capability such as Python is a plus.

• Occasional international business travel is required for this position.