Principal Engineer

Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our we affectionately refer to it as the and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.

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Job Description:

• Post-Silicon Physical Layer Electrical Validation/Characterization Engineers will be self-motivated and will perform post-Silicon device validation and debugging of high speed SerDes.
• These candidates will need to have strong SW development background and should have worked in automation environments.
• The ideal candidate should leverage their knowledge and experience to provide leadership, technical guidance, and proper execution of silicon validation.

Requirements/Qualifications:

​Qualification:

• Qualification:B.E/B.Tech / M.E/M.Tech in Electrical / Electronics Engineering.
• Experience:8-10 years (BTech) or 6-8 years (MTech) in Post-Silicon Physical Layer Electrical Validation.
• Protocols:Deep knowledge of high speed SerDes protocols (PCIe, USB, CXL, Ethernet).
• Knowledge: Good understanding of Jitter Decomposition, Equalization, & De-embedding techniques.
• Lab Equipment:Hands-on experience with high-bandwidth Oscilloscopes, BERT, and VNA.
• Scripting/Tools:Proficiency in Python, Linux for test automation.

Requirements:

• Silicon Bring-Up & Validation:Lead laboratory testing of test chips to validate high-speed physical layer electrical performance.
• Compliance Testing:Conduct compliance testing for interfaces such as PCIe, USB, Ethernet, and DDR, ensuring compliance with standard specifications.
• Hardware Automation:Develop and maintain hardware infrastructure and automation scripts for test characterization.
• Debug & Characterization:Analyze, debug, and root cause silicon issues using oscilloscopes, network analyzers, and BERT.
• Documentation:Generate test plans, high-quality characterization reports, and documentation for internal/external customers.
• Cross-functional Collaboration:Work with design teams/product Engineering teams to align with post-silicon findings