Principal Design Engineer

Job description

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success.
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests.
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day.

Design Verification Engineer

• Cadence is seeking an experienced design verification engineer who will play a critical role in the development of custom accelerator SoCs, in partnership with Cadence computational simulation teams
• We are developing hardware acceleration technology to accelerate many of the new simulation domains that Cadence is investing in
• This role would be a part of a small, cross discipline team to define, implement, prototype, and eventually deliver working hardware accelerators
• It would be a small team that would leverage IP technology from IPG and work with design teams from other cadence organizations
• One of the primary vehicles for development and analysis would be emulation
• The qualified candidate will closely work together with ARCH, RTL and FW/SW team in implementation and optimization of our accelerator solution
• The candidate must possess hands-on experience and excellent debugging skills in developing System Verilog/UVM based testbenches
• Ability to independently verify complex modules in the context of subsystem/SOC using systemic metric-driven approach must be demonstrated
• Past participation in successful IP delivery or SOC tape-out is highly desired
• Effective cross-team communication and documentation skill is strongly preferred
• Experience in automating verification regression and/or management of revision control is a plus
• Minimal qualification requires BS/MS degree ECE or CS with 7+ years of experience in related fields
• ASIC/Processor Design Verification position
• Own all aspects of block/sub-system design-verification:
• Test-plan creation/execution
• Test-bench (all components) creation / enhancement / maintenance
• code/functional coverage
• Will be involved in post silicon validation/bring up
• Bangalore (India) based position.

Job Requirements:

*Strong expertise in building test-benches using: System-Verilog, UVM, C/C++

* Strong digital logic fundamentals and understanding

* Experience in functional coverage/code coverage/assertions (SVA) development and closure

* Experience in creating and maintaining *executable* test plans

* Strong debug skills

* Proficient in scripting/automation using any standard scripting language like Perl etc.

* Excellent verbal and written communication skills and a good team player

Role: Head - Hardware Engineering

Industry Type: IT Services & Consulting

Department: Engineering - Hardware & Networks

Employment Type: Full Time, Permanent

Role Category: Hardware

Education

UG: Any Graduate

PG: Any Postgraduate

Key Skills

C++AutomationASICSOCDebuggingTest planningSystem designPerlSystem verilogAutomotive