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Responsibilities :
B.Tech/BE/ME/Mtech
Job Description
Design and lead high speed IP (GDDR7,DDR5,LPDDR6) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development - analog design, layout, digital design, documentation, and silicon validation. Would be required to participate in customer facing discussions.
Requirements
B.Tech/BE/ME/Mtech
Exp - 5 +yrs
. Hands on design experience and leading GDDR/DDR/LPDDR IP's
. Must have participated in full cycles of analog IP creation - right from spec to silicon debug and char
. Must have good communication skills and should be team player.
. Working experience in GDDR, DDR, LPDDR) development is must
Cadence is a health technology company helping the nation’s most patient-centric health systems deliver more consistent, proactive healthcare every day. Cadence’s remote patient intervention solution couples powerful new technology with clinical excellence, providing its patients a precise and personal level of care all outside of the four walls of the hospital.At Cadence, we aim to exceed the expectations of our patients, clinicians, and partners every day. Our team values trust and autonomy, and we empower one another to make decisions, solve problems and build something better. We give clear, candid feedback with the utmost honesty and encouragement. If you’re interested in joining us, explore opportunities at www.cadence.care.
Job ID: 149923041
Skills:
DDR, Silicon Validation, Layout, Documentation, LPDDR, Analog Design, Digital Design, GDDR
Skills:
Verilog, System Verilog, LPDDR, Uvm, DDR memory protocols, HBM, Functional Verification
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