About Tessolve
Tessolve Semiconductors a venture of Hero Electronix, part of $5B Hero Group companies a Design and Test Engineering Service Company providing End to End Solutions from Product Engineering, Software, Hardware, Wireless, Automotive and Embedded Solutions. Currently we are 2300+ employees worldwide.
We are Global Multi- National Company having Engineering and Sales presences in India, Malaysia, Singapore, USA, UK, Europe, and China. Tessolve has strategic and sustainable growth plan to ensure the business stability to our valued customers and to protect the career of our employees even under disturbed Business situations.
About Tessolve: Careers - Tessolve
Areas Of Responsibility
- Ensuring DDR PHY and controller designs adhere strictly to JEDEC standards (DDR4/DDR5/LPDDR5/LPDDR6)
- Using simulators (e.g., VCS) and emulators (e.g., Synopsys ZeBu, Cadence Palladium) to debug design failures and root cause issues before tape-out.
- Validating power-sensitive LPDDR5 states, including self-refresh and deep power-down modes.
- Running simulations to verify timing margins, memory throughput, and latency, often collaborating on Python scripting for automation.
- Ensuring proper integration between the DDR controller, PHY, and SoC firmware
- Develop and execute test plans in C to validate the Features.
- In depth knowledge of one or more peripheral protocols and specifications
- Bare metal/Linux driver development, Firmware development.
Experience
2 to 7 years of experience
- Understanding Pre-Silicon Validation for DDR4/LPDDR4/LPDDR5
- Pre-silicon validation means verifying design and firmware before the silicon chip is fabricated. It includes simulations, emulation, and formal verification to catch bugs early.
- For DDR memory interfaces (DDR4, LPDDR4, LPDDR5), pre-silicon validation focuses on: o Protocol compliance (timing, command sequences, training sequences) o Signal integrity modeling and timing margins o Firmware interactions (training firmware, calibration sequences) o Power management features (especially for LPDDR5 with deeper power states)
- Using hardware description languages (HDL) and simulators (like Synopsys VCS, Cadence Incisive) for DDR PHY and controller
- Proficient in C for low-level firmware
- Ensuring DDR commands follow JEDEC standards (DDR4/LPDDR4/LPDDR5 specs)
- Debugging skills using logic analyzers, oscilloscopes, and simulation waveforms
- Good knowledge of memory controller registers and MMIO access
Disclaimer
At Tessolve, we are committed to fostering a workplace that embraces and celebrates diversity in all its forms. We believe that diverse teams drive innovation, creativity, and success. We are dedicated to creating aninclusive environment where all employees, regardless of their race, color, religion, gender, gender identity or expression, sexual orientation, national origin, genetics, disability, age, or veteran status, feel valued and respected. We believe in fair and equitable treatment for all employees and aim to eliminate any biases or barriers that may hinder personal or professional growth.
