Physical Design Engineer

Required skills:

• Digital design
• SoC integration experience
• Preferably using AMD flows
• RTL / Verilog proficiency
• Design or integration using multiple clocks and power domains
• Debugging skills (preferably using Verdi)
• CDC/RDC/Lint experience
• Manual ECOs implementation

Added advantage

• Subsystem integration experience
• IO integration experience
• Repeaters/Register slice insertion
• Preferably using AMD xml-based flow
• Experience working with PD team to have knowledge about concepts like placement, routing, congestion, load, timing etc.