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HCLTech

Physical Design Engineer

4-6 Years
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Job Description

Physical Design Engineer (4 Years Experience)

Location: Kerala, India (preferred: Kochi, Trivandrum, Calicut or nearby regions)

Employment Type: Full-time

Experience Level: 4+ Years in VLSI Physical Design

About the Role

We are seeking a skilled Physical Design Engineer with 4 years of hands-on experience in ASIC/SOC implementation. The ideal candidate should have strong expertise across the RTL-to-GDSII flow, timing closure, and advanced process technologies. Candidates located in or willing to relocate to Kerala are preferred.

Key Responsibilities

  • Drive physical design implementation from synthesis through final GDSII sign-off
  • Perform floorplanning, power planning, clock-tree synthesis (CTS), place-and-route (PnR), and routing optimization
  • Work on timing closure, signal integrity (SI), IR drop analysis, and EM reliability
  • Conduct static timing analysis (STA) using industry-standard tools
  • Collaborate with RTL, DFT, verification, and architecture teams for design convergence
  • Perform physical verification (LVS/DRC) and fix violations
  • Support low-power design methodologies (UPF/CPF)
  • Debug physical design issues and drive design quality improvements
  • Prepare design documentation and participate in reviews
  • Contribute to tape-out activities for complex SOC/ASIC blocks

Required Skills & Experience

  • 4 years of experience in ASIC/SOC Physical Design
  • Strong hands-on experience with tools such as:
  • Cadence Innovus
  • Synopsys ICC/ICC2
  • PrimeTime (STA)
  • Redhawk/Voltus (IR/EM analysis)
  • Calibre (LVS/DRC)
  • Solid understanding of:
  • RTL-to-GDS flow
  • Floorplanning, PnR, CTS
  • Static timing analysis (STA)
  • Power optimization techniques
  • Physical verification flows
  • Multi-corner, multi-mode (MCMM) methodologies
  • Experience working on 7nm/14nm/28nm technology nodes (any relevant node acceptable)

Preferred Qualifications

  • Bachelor's or Master's degree in ECE, EE, or related fields
  • Experience in block-level or full-chip physical design
  • Exposure to low-power design, multi-clock domain architectures
  • Familiarity with scripting (Tcl/Perl/Python) for automation

Soft Skills

  • Strong analytical and problem-solving abilities
  • Clear communication and documentation skills
  • Ability to collaborate in cross-functional teams
  • Ownership mindset and ability to work independently

Work Location & Flexibility

  • Candidates located in Kerala or nearby states preferred

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About Company

Job ID: 143966973

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