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We are seeking a skilled Physical Design Engineer to join our team in India. The ideal candidate will be responsible for the physical design and layout of integrated circuits, ensuring they meet performance, timing, and power specifications. This role requires a strong technical background in VLSI design, as well as experience with various EDA tools.
Job ID: 111843167
Skills:
static timing analysis, industry-standard EDA tools for physical design and verification, Synthesis, RTL-to-GDS workflows, multi-power domain analysis, low-power design techniques, Place And Route, Clock Tree Synthesis
Skills:
layout verification , System Verilog, Computer Engineering, Tcl, ASIC Design, Electrical Engineering, Computer Science, design rules, low power designs
Skills:
Scripting, Perl, Tcl, Calibre, Innovus, Assura, Cv, ICC2, Cadence, EDA Tools, Verification Tools
Skills:
C, Tcl, Routing, Perl, Physical Verification, LEC, Calibre, Innovus, floorplanning, EDA Tools, Clock Planning, ICC2, primetime, Placement, Timing Closure, Physical Design Implementation
Skills:
Python, Tcl, floorplanning, Physical design flows, Logical Equivalence, Clock CTS, Synthesis, Timing Analysis, EDA Tools, Budgeting, Physical Verification DRC LVS ERC, Place And Route