Physical Design Engineer

Project Role : Physical Design Engineer

Project Role Description : Translate logical circuit designs into a physical layout, optimizing for area, power, and timing. Perform placement, routing, and clock tree synthesis, ensuring the design meets timing and manufacturing constraints. Work closely with timing and verification teams to resolve any physical design issues before tape-out.

Must have skills : Physical Design

Good to have skills : NA

Minimum 5 Year(s) Of Experience Is Required

Educational Qualification : 15 years full time education

Summary:

As a Physical Design Engineer, a typical day involves transforming logical circuit schematics into efficient physical layouts. This role requires careful optimization of design parameters such as area, power consumption, and timing to meet stringent manufacturing requirements. The engineer collaborates closely with various teams to perform placement, routing, and clock tree synthesis, ensuring the design adheres to all constraints. Continuous interaction with timing and verification groups is essential to identify and resolve any physical design challenges before finalizing the design for tape-out. The role demands a proactive approach to problem-solving and coordination across multiple disciplines to achieve successful project outcomes.

Roles & Responsibilities:

• Expected to be an SME, collaborate and manage the team to perform.
• Responsible for team decisions.
• Engage with multiple teams and contribute on key decisions.
• Provide solutions to problems for their immediate team and across multiple teams.
• Lead the coordination of design reviews and ensure alignment with project goals.
• Mentor junior engineers to enhance their technical skills and understanding of physical design processes.
• Drive continuous improvement initiatives to optimize design methodologies and workflows.
  
  

Professional & Technical Skills:

• Must To Have Skills: Proficiency in Physical Design.
• Strong knowledge of placement and routing techniques to optimize chip layout.
• Experience with clock tree synthesis and timing closure methodologies.
• Ability to analyze and resolve physical design issues related to power, area, and timing.
• Familiarity with design for manufacturability and design rule checks.
• Competence in collaborating with timing and verification teams to ensure design integrity.
  
  

Additional Information:

• The candidate should have minimum 5 years of experience in Physical Design.
• This position is based at our BDC6F - SEZ office.
• A 15 years full time education is required.