Must demonstrate expertise in using the Cadence Allegro tool for PCB design and basic knowledge of schematic design using Allegro Concept HDL / OrCAD Capture.
Candidate should have a strong understanding of Design for Manufacturing (DFM) and Design for Assembly (DFA) principles.
Must possess hands-on experience in designing high-speed digital interfaces such as PCIe Gen5&6 and DDR5 and HDI layout design.
Candidate should be proficient in creating component footprints according to industry standards.
Proficient in best case analysis to proactively identify and mitigate potential design issues.
Should have excellent communication skills and be able to effectively collaborate with team members and stakeholders.