Search by job, company or skills

Google India

Lead Technical Program Manager, Silicon

Save
new job description bg glownew job description bg glow
  • Posted 12 days ago
  • Be among the first 10 applicants
Early Applicant

Job Description

Minimum qualifications:

  • Bachelor's degree in a technical field, or equivalent practical experience.
  • 10 years of experience in program management.
  • Experience in SoC development over the full product cycle from pre-silicon to commercialization and IP and SoC delivery.

Preferred qualifications:

  • 10 years of experience managing complex cross-functional or cross-team projects.

About The Job

A problem isn't truly solved until it's solved for all. That's why Googlers build products that help create opportunities for everyone, whether down the street or across the globe. As a Technical Program Manager at Google, you'll use your technical expertise to lead complex, multi-disciplinary projects from start to finish. You'll work with stakeholders to plan requirements, identify risks, manage project schedules, and communicate clearly with cross-functional partners across the company. You're equally comfortable explaining your team's analyses and recommendations to executives as you are discussing the technical tradeoffs in product development with engineers.

As a Senior Silicon Implementation Technical Program Manager (TPM) team, you will lead a team responsible for SOC development over the full product cycle from pre-silicon to commercialization. You will have a strong understanding of IP and SoC delivery in an exceptional silicon team. You will bring a breadth of expertise across silicon architecture, RTL, Design Verification (DV), Physical Design (PD), etc. to enable silicon productization. You will drive execution of multiple concurrent SoC projects, this includes coordination of deliverables across multiple geographies, managing overall program schedules at Power Performance Area (PPA) and quality, negotiations with stakeholders and escalation when needed to get decisions made and dissemination of program status across the team. You will need to have excellent written and verbal communication skills and relationship building across stakeholders.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

  • Work closely with engineering teams to develop and manage custom silicon projects.
  • Help engineering teams communicate project status to internal stakeholders across Google.
  • Work closely with partners on product development schedules, dependencies and budgets.
  • Identify risks, develop mitigation strategies and facilitate conflict resolution and drive program reviews, build schedules cross-functionally, and keep program milestones on track.
  • Interface between partners and product engineering teams, setting and managing schedules and milestones. Travel and Google Video Conferencing (GVC) required to coordinate with teams in Mountain View/APAC.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

More Info

Job Type:
Industry:
Function:
Employment Type:

About Company

Job ID: 148090551

Similar Jobs

Bengaluru, India

Skills:

Debugging ToolsPcieEthernetDSP algorithmsclock validationmemory subsystemsfuse controllersverification methodologiesSimulation ToolsAMBA protocolsIP Subsystem SoC-level verificationmicroarchitecture conceptssystemverilogcoverage closureboot flowssecurity validation flowsrandom test case developmentdebugging capabilities for SoC fabricadvanced computer architecturePerformance Analysis

Bengaluru, India

Skills:

CacheVerilogpower analysisSynthesismemory compressionFPGA design verificationdigital logic design principlessystemveriloglogic synthesis techniquesRTL design conceptsDftfabric coherenceDRAMlow-power design techniques

Bengaluru, India

Skills:

Embedded CFpgaCSpiDDRPcieSataUsbBIOSUefiSystem Architectureemulation verificationPost Silicon ValidationMemory subsystemtechnical debugSecurity ProtocolsNPUpower managementemulation platformsSoC IP level Power ManagementValidationlow power designvalidation strategyhigh speed IO peripheralsAxiMIPISoC Verification

Bengaluru, India

Skills:

System ArchitectureUsbEmbedded CPciUefiSpiCFpgaBIOSSataPcieDDRemulation verificationvalidation strategyMIPIPost Silicon Validationhigh speed IO peripheralsAxiMemory subsystemSecurity ProtocolsSoC Verificationtechnical debugemulation platformsSoC IP level Power ManagementValidationlow power designNPUpower management

Bengaluru, India

Skills:

Embedded CFpgaCSpiDDRPcieSataUsbBIOSUefiSystem Architectureemulation verificationPost Silicon ValidationMemory subsystemtechnical debugSecurity ProtocolsNPUpower managementemulation platformsSoC IP level Power ManagementValidationlow power designvalidation strategyhigh speed IO peripheralsAxiMIPISoC Verification