Responsibilities for this role include:
We are working on the next generation RTL-to-GDSII solution. You should be able to completely own and drive the design and development of various pieces of the RTL synthesis technology, logic optimizations and low power synthesis.
Experience and Qualifications:
- 5-8 years of proven experience in software development.
- B.Tech or M.Tech in CSE/EE/ECE from a reputed engineering college.
- Good knowledge of C/C++, algorithm and data structures.
- Good problem solving and analytical skills.
- Ability to guide and lead others, towards project completion.
Desirable:
- We are looking for an individual with previous experience in RTL synthesis tool development.
- Knowledge of Verilog, VHDL, and formal verification.
- Expertise in RTL and gate-level logic, area, timing, and power optimizations.
- Familiarity with parallel algorithms and job distribution techniques.
- Proficiency in scripting languages like Python and Tcl.
Communication
- Proficiency in English with strong interpersonal and excellent oral and written communication skills.
- Ability to collaborate as part of globally distributed team. Also, Self-motivated and able to work independently.
- We thrive on building a multi-functional team environment, and we look for individuals who are eager to contribute and grow with us!
