Lead - FPGA Validation and Emulation

Lead FPGA Validation & Emulation (ZeBu/Veloce)

We are seeking an experienced Lead Engineer to drive FPGA-based SoC validation and emulation using industry-leading platforms such as Synopsys ZeBu and Siemens Veloce.

Key Responsibilities

Lead emulation platform bring-up, compilation, partitioning, and execution.

Perform pre-silicon validation and debug of complex SoCs.

Integrate emulation with UVM-based verification environments (TBX/SCE-MI).

Support FPGA prototyping activities including timing closure and optimization.

Develop automation scripts for regression and platform efficiency improvements.

Mentor junior engineers and coordinate with cross-functional global teams.

Required Skills & Qualifications

Hands-on expertise with Synopsys ZeBu and/or Siemens Veloce emulation platforms.

Strong RTL knowledge (SystemVerilog/Verilog) and UVM verification experience.

Solid understanding of SoC architecture and AMBA/AXI protocols.

Debug proficiency using Verdi, DVE, Veloce Analyzer, waveform tools.

Scripting skills in Python/TCL/Shell for automation.

Experience

8+ years of experience in SoC verification, FPGA validation, or emulation.

Preferred Qualifications

Exposure to Linux boot validation, PCIe/DDR/Ethernet subsystems, and hybrid verification flows.