Work Expertise : 8 - 10 years
Job Specs:
- B.E / B.Tech or M.E / M.Tech in Electronics, Electrical, or VLSI Engineering.
- Expertise in high performance analog layout in advance CMOS process nodes
- Expertise in layouts of high performance and high speed analog blocks(ADC, DAC, PLL)
- Expertise in high speed SERDES is mandatory
- Expertise in analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology
- Expertise in physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
- Expertise in layout automation using SKILL/PERL/Python
