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Lead Design Engineer

Cadence
Noida
4-9 Years
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Job Description

  • Lead design or verification activities for Tensilica CPU/DSP processor cores, multiprocessor subsystems, and associated peripherals.
  • Develop and implement RTL micro-architecture using Verilog, ensuring adherence to timing, area, and power constraints.
  • Design and execute verification strategies including test plan development, UVM-based verification, functional diagnostics, and coverage analysis.
  • Perform simulation, debugging, synthesis, and place-and-route analysis using EDA tools.
  • Develop and maintain SystemVerilog assertions (SVA), functional coverage models, and verification environments.
  • Analyze and debug design and verification failures across RTL, gate-level, and system-level simulations.
  • Collaborate closely with design, verification, and EDA teams to ensure end-to-end chip design quality and closure.
  • Develop assembly-level diagnostics and support embedded software validation for processor subsystems.
  • Contribute to micro-architecture definition, design reviews, and cross-functional technical discussions.
  • Mentor junior engineers and contribute to best practices in design and verification methodologies.

More Info

Job Type:
Permanent Job
Industry:
Software Engineering
Role:
Other Roles
Function:
Others
Employment Type:
Full time

About Company

Cadence

Job ID: 148700205

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Last Updated: 04-06-2026 11:26:48 AM
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