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Cadence Design Systems

Lead Design Engineer

3-8 Years
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Job Description

Job description

  • BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.
  • 4+ years of Design Verification experience with SV/UVM
  • Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
  • Design Verification experience verifying complex designs and leading projects from concept to verification closure.
  • Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required.
  • Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage.

Role: Design Verification Engineer

Industry Type: IT Services & Consulting

Department: Engineering - Hardware & Networks

Employment Type: Full Time, Permanent

Role Category: Hardware

Education

UG: B.Tech/B.E. in Production/Industrial

PG: M.Tech in Electronics/Telecommunication

Key Skills

Design verificationVLSICodingElectronicsManager TechnologyTest planningSystem verilogUVMElectricals

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About Company

Cadence is a pivotal leader in electronics and system design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world¢€™s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work Force

Job ID: 107296777

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